1. Field of the Invention
The present invention relates to an electrically rewritable non-volatile semiconductor storage device and a method of manufacturing the same.
2. Description of the Related Art
Conventionally, LSIs are formed by integration of devices in a two-dimensional plane on the silicon substrate. Although the dimension for each device must be reduced (refined) to increase memory storage capacity, recent years are facing challenges in such refinement from the viewpoint of cost and technology. Such refinement requires further improvements in photolithography technology. However, in currently available ArF immersion lithography technology, for example, the resolution limit has been reached around the 40 nm design rule and so EUV exposure devices have to be introduced for further refinement. However, the EUV exposure devices are expensive and infeasible in view of the costs. In addition, if such refinement is accomplished, it is expected that physical improvement limit, such as in breakdown voltage between devices, would be reached unless driving voltage can be scaled. That is, it is likely that difficulties would be encountered in device operation itself.
Therefore, a large number of semiconductor storage devices have been proposed recently where memory cells are arranged in a three-dimensional manner to achieve improved integration of memory devices (see, Japanese Patent Laid-Open No. 2007-266143).
One of the conventional semiconductor storage devices where memory cells are arranged in a three-dimensional manner uses transistors with a cylinder-type structure (see, Japanese Patent Laid-Open No. 2007-266143). Those semiconductor storage devices using transistors with the cylinder-type structure are provided with multiple laminated conductive layers corresponding to gate electrodes and pillar-like columnar semiconductor layers. Each of the columnar semiconductor layers serves as a channel (body) part of each of the transistors. MONOS (Metal-Oxide-Nitride-Oxide-Semiconductor) layers are provided around the columnar semiconductor layers. Such a configuration including laminated conductive layers, columnar semiconductor layers, and MONOS layers is referred to as a “memory string”.
In each memory string, MONOS layers are formed across multiple laminated conductive layers without being separated. Therefore, there is some concern that the amount of signal may be reduced due to transfer of electric charges in the MONOS layers. As such, there is a need for ensuring reliability of the semiconductor storage devices.